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Bio-inspired Chaotic Neurons ICs for Emulation of Nerve Chaos

Team: Manuel Delgado-Restituto, Rafael López-de-Ahumada and Angel Rodríguez-Vázquez

Date: 1994

 

Physical Data
  • 1.5µ m CMOS n-well, single poly, double metal.
  • 650µ m x 350µ m (excluding pads)
  • 96 transistors.
Electrical Data
  • Current-Mode circuit.
  • 5v@2.1mW
  • Current and voltage-controlled operation.
  • 500Khz clock frequency.
Design Technique:
  • Analog full-custom.
  • Switched-Current circuits:
    • Self-biased cascode current mirrors.
    • Dummy switches with in-loop error correction.
  • Current sensing circuitry with 10pAs current detection capability.
  • Current multiplier with large linear and control ranges.
Features and Applications:
  • IC realization of biological neurons.
  • Real-time experimental demonstration of complexity.
  • Associative Memories with large storage capability.
  • Self-annealed dynamic process for combinatorial optimization.

 

Most artificial neural networks use a simple neuron model where the processing realized by the soma involves a static nonlinear transformation, with either sigmoid or threshold characteristics. However, recent studies on real nerve membranes in neurophysiological experiments have shown that the dynamic behavior of biological neurons is much more complex (including chaotic response) than that exhibited by simple models. Consequently new schemes of artificial neural networks have emerged to more realistically emulate the chaotic responses experimentally observed in biological systems. In particular, some remarkable chaotic neuron models have been reported by Nagumo and Sato; and Aihara, Takabe and Toyoda.

Many studies on chaotic neural networks in general, and using the previous models in particular, reveal that such networks serve not only as an experimental vehicle in the study of sensory nerve systems, but also lead to important engineering applications. In this sense, chaotic neural networks have been proposed to solve difficult optimization problems; for dynamical associative pattern classification; and for signal detection and classification in noisy environments, and it is predictable that new applications will arise in the near future.

In spite of the strong economical interest involving these applications, few up-to-date physical implementations of chaotic neural networks have been proposed. Thus, it is advisable to give circuit realizations of these models. Furthermore, due to the technological trend towards system integration, these circuits must be well-suited for VLSI, and, if possible, compatible with standard low cost CMOS technologies. This chip reports a very efficient monolithic implementation of chaotic neurons that uses advanced dynamic current-mode techniques for full compatibility with standard VLSI fabrication technologies.

More details are available in the following papers:

 

References:

  1. [Delg94] M. Delgado-Restituto and A. Rodríguez-Vázquez: "Switched-Current Chaotic Neurons". Electronics Letters, Vol. 30, pp. 429-430, March 1994.
  2. [Rodr94] A. Rodríguez-Vázquez and M. Delgado-Restituto: "Generation of Chaotic Signals Using Current-Mode Techniques". Journal of Intelligent and Fuzzy Systems, Vol. 2, pp. 15-38, January 1994.

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